The refinement and improvement of metallization systems, particularly multilevel metallization systems, are critical to the development of integrated circuit technology, particularly as critical dimensions shrink below one micron.
Multilevel metallization systems are comprised of alternating layers of dielectric and metal materials. Most commonly, the metal layers are comprised mainly of aluminum or aluminum alloys. The metal interconnects in the layer closest to the silicon surface make contact to the underlying silicon devices through contact holes etched in the first interlevel dielectric layer, also known as ILD0. The successive metal layers are electrically connected to each other as required by openings known as vias which are etched through the interlevel dielectric layers. Vias are typically filled with a conductor such as aluminum or tungsten. The conducting material filling the via is called a via plug.
Both the metallic interconnects and the interlayer dielectrics have evolved from simple, single-layer structures into complex structures known as stacks which comprise a series of layers. By way of example, aluminum alloy metallization lines, which may contain small amounts of copper, are typically sandwiched between conducting underlayers and overlayers. Underlayers such as Ti, TiN, or Ti/TiN are deposited onto the dielectric and onto any exposed metal from the metal layer below. These underlayers have been shown to increase the electromigration resistance of the aluminum/aluminum alloy interconnect by improving the grain structure or crystallographic texture of the Al, as well as increasing the grain size. If a void forms in the Al metallization during testing or under operation, this underlayer also serves as a shunt layer and may support continuous current flow. The aluminum or aluminum alloy which serves as the main conductor is deposited over the underlayer, and an overlayer, usually termed the Anti-Reflective Coating (ARC), which serves primarily to enhance the resolution of the lithographic process used for patterning the metal lines, is deposited thereon.
Use of a Ti/TiN underlayer has become a standard for Al metallization, particularly when tungsten via plugs are used. A thin Ti layer is typically sputter deposited, then TiN is deposited over it by sputtering Ti in a nitrogen ambient. One use of the Ti layer is to improve the adhesion of the TiN diffusion barrier layer to the underlying silicon oxide dielectric. The Ti layer in the barrier metal tungsten plug liner also improves adhesion to the antireflective coating (ARC) covering the top of the underlying metal line that the plug is contacting. The TiN on top of the Ti layer serves as a diffusion barrier for the fluorine byproduct left from the WF6 which is used as one of the reactants in the tungsten Chemical Vapor Deposition (CVD) process for via plug deposition. Fluorine reacts with Ti producing titanium fluoride which increases the contact/via resistance. TiN has lower reactivity with fluorine, and thereby yields lower contact/via resistance. The TiN also serves as an adhesion/nucleation layer to the tungsten. Additionally, the use of a Ti/TiN underlayer can improve the resistance of the Al alloy to electromigration failure, compared to a conventional Ti or TiN underlayer alone.
For layered structures as described above employing materials having differing thermal expansion coefficients, stress and stress-induced strain in the aluminum or the Ti/TiN underlayer become issues, particularly during subsequent high-temperature processing steps.
An example of the effects of stress in the aluminum layer is the formation of hillocks. Hillocks are protrusions which form in response to a state of compressive stress in a metal film, and consequently protrude from the film's surface. The compressive stress generally arises from the difference in the thermal expansion coefficient between the metal and the adjacent materials. Hillock growth takes place via a vacancy-diffusion mechanism. Vacancy concentration increases with stress and temperature, and the rate of difflusion is exponentially activated with temperature. Aluminum is particularly susceptible to hillock formation and associated stress-induced voids, due to its low melting point and its consequent high rate of vacancy diffusion. Therefore the ARC overlayer serves an additional important function in aluminum metallization systems. The overlayer is rigid and can withstand the stresses induced in the aluminum film, thereby inhibiting hillock formation.
Another example of undesirable effects of stress in the aluminum layer is the presence of stress-induced, hillock-like extrusions of metal into the via holes which can occur prior to and during deposition of the next metal layer or during the via fill process. Such extrusions and the associated problems have been reported by Shibata et al, in 1993 IEEE IRPS Proc. pg. 340 (1993). In this paper, the authors report occurrence of simultaneous aluminum extrusion into the via hole and void formation in the aluminum interconnects. The voids drastically degrade the reliability of aluminum lines with vias.
Stress in the Ti/TiN underlayer also has negative effects. Due to the differences in molecular structure of the two materials, an oxide/TiN interface (with or without a thin Ti layer therebetween) results in inherent tensile stress in the TiN deposited layer. This stress is manifested by wafer warpage, i.e., the wafer surface becomes convex with respect to the interconnect side, this change in the curvature of the wafer being measurable. Wafer warpage results in alignment problems during subsequent processing steps, due to poor seating of the wafer on its chuck, and the curvature additionally causes linewidth non-uniformity during subsequent lithography and etching steps. Additionally, excessive wafer warpage can cause clamping problems or wafer breakage. All of these factors contribute to lowered yield.
Additionally, it has been experimentally observed that for Al-5% Cu alloy deposited on TiN, higher stress level in the TiN results in more copper segregation to the Al--Cu/TiN interface via grain boundary diffusion. This causes greater amounts of etch residue during ensuing metal etch.
Finally, it is believed that the aforementioned incidence of stress voids and extrusions in the aluminum is correlated with the stress level of the TiN underlayer, due to the stress induced in the aluminum by the physical wafer warpage.
All of the aforementioned negative consequences of stress in TiN layers used in multilevel metallization structures demonstrate the need for methods of reducing this stress.